MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 311
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MMC2114CFCAG33
Manufacturer Part Number
MMC2114CFCAG33
Description
IC MCU 32BIT 33MHZ 144-LQFP
Manufacturer
Freescale Semiconductor
Series
MCorer
Specifications of MMC2114CFCAG33
Core Processor
M210
Core Size
32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
67
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
MMC2114
Core
M-CORE
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
104
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
MCORE
No. Of I/o's
104
Ram Memory Size
32KB
Cpu Speed
33MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MMC2114CFCAG33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
OVW — Overwrite Bit
PIE — PIT Interrupt Enable Bit
PIF — PIT Interrupt Flag
RLD — Reload Bit
EN — PIT Enable Bit
Programmable Interrupt Timer Modules (PIT1 and PIT2)
The read/write OVW bit enables writing to PMR to immediately
overwrite the value in the PIT counter.
The read/write PIE bit enables the PIF flag to generate interrupt
requests.
The read/write PIF flag is set when the PIT counter reaches 0x0000.
Clear PIF by writing a 1 to it or by writing to PMR. Writing 0 has no
effect. Reset clears PIF.
The read/write RLD bit enables loading the value of PMR into the PIT
counter when the count reaches 0x0000.
The read/write EN bit enables PIT operation. When the PIT is
disabled, the counter and prescaler are held in a stopped state.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Writing PMR immediately replaces value in PIT counter.
0 = Value in PMR replaces value in PIT counter when count
1 = PIF interrupt requests enabled
0 = PIF interrupt requests disabled
1 = PIT count has reached 0x0000.
0 = PIT count has not reached 0x0000.
1 = Counter reloaded from PMR on count of 0x0000
0 = Counter rolls over to 0xFFFF on count of 0x0000
1 = PIT enabled
0 = PIT disabled
reaches 0x0000.
Go to: www.freescale.com
Programmable Interrupt Timer Modules (PIT1 and PIT2)
Memory Map and Registers
Advance Information
311
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