MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 402

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Serial Peripheral Interface Module (SPI)
18.7.1 SPI Control Register 1
Advance Information
402
Address: 0x00cb_0000
Reset:
Read: Anytime
Write: Anytime
SPIE — SPI Interrupt Enable Bit
Read:
Write:
0x00cb_0000
0x00cb_0001
0x00cb_0002
0x00cb_0003
0x00cb_0005
0x00cb_0006
0x00cb_0007
0x00cb_0008
1. S/U = CPU supervisor or user mode access. User mode accesses to supervisor only ad-
The SPIE bit enables the SPIF and MODF flags to generate interrupt
requests. Reset clears SPIE.
Freescale Semiconductor, Inc.
Address
dresses have no effect and result in a cycle termination transfer error.
For More Information On This Product,
1 = SPIF and MODF interrupt requests enabled
0 = SPIF and MODF interrupt requests disabled
Serial Peripheral Interface Module (SPI)
SPIE
7v‡Ã&
0
Figure 18-2. SPI Control Register 1 (SPICR1)
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SPI Pullup and Reduced Drive Register (SPIPURD)
SPE
%
0
SPI Port Data Direction Register (SPIDDR)
Table 18-2. SPI Memory Map
SPI Port Data Register (SPIPORT)
SWOM
SPI Baud Rate Register (SPIBR)
SPI Control Register 1 (SPICR1)
SPI Control Register 2 (SPICR2)
SPI Status Register (SPISR)
$
0
SPI Data Register (SPIDR)
MSTR
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
Bits 7–0
#
0
CPOL
"
0
CPHA
!
1
SSOE
0
MOTOROLA
Access
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
LSBFE
7v‡Ã
0
(1)