MMC2114CFCAG33 Freescale Semiconductor, MMC2114CFCAG33 Datasheet - Page 413

• Manufacturer Part Number: MMC2114CFCAG33
• Description: IC MCU 32BIT 33MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCorer

Specifications of MMC2114CFCAG33

• Core Processor: M210
• Core Size: 32-Bit
• Speed: 33MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: MMC2114
• Core: M-CORE
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 33 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Controller Family/series: MCORE
• No. Of I/o's: 104
• Ram Memory Size: 32KB
• Cpu Speed: 33MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

18.8 Functional Description
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
The SPI module allows full-duplex, synchronous, serial communication
between the MCU and peripheral devices. Software can poll the SPI
status flags or SPI operation can be interrupt driven.
Setting the SPE bit in SPICR1 enables the SPI and dedicates four SPI
port pins to SPI functions:
When the SPE bit is clear, the SS, SCK, MOSI, and MISO pins are
general-purpose I/O pins controlled by SPIDDR.
The 8-bit shift register in a master SPI is linked by the MOSI and MISO
pins to the 8-bit shift register in the slave. The linked shift registers form
a distributed 16-bit register. In an SPI transmission, the SCK clock from
the master shifts the data in the 16-bit register eight bit positions, and the
master and slave exchange data. Data written to the master SPIDR
register is the output data to the slave. After the exchange, data read
from the master SPIDR is the input data from the slave.
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Freescale Semiconductor, Inc.
For More Information On This Product,
SHIFT REGISTER
Slave select (SS)
Serial clock (SCK)
Master out/slave in (MOSI)
Master in/slave out (MISO)
GENERATOR
MASTER SPI
Serial Peripheral Interface Module (SPI)
BAUD RATE
SPIDR
Go to: www.freescale.com
Figure 18-10. Full-Duplex Operation
MISO
MOSI
SCK
SS
V
DD
Serial Peripheral Interface Module (SPI)
MISO
MOSI
SCK
SS
Functional Description
Advance Information
SHIFT REGISTER
SLAVE SPI
SPIDR
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