D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 1054

IC H8S/2300 MCU ROMLESS 128QFP

D12321VF25V

Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12321VF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12321VF25V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
D12321VF25V
Manufacturer:
Renesas
Quantity:
675
Part Number:
D12321VF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Appendix A Instruction Set
A.4
The tables in this section can be used to calculate the number of states required for instruction
execution by the CPU. Table A.5 indicates the number of instruction fetch, data read/write, and
other cycles occurring in each instruction. Table A.4 indicates the number of states required for
each cycle. The number of states required for execution of an instruction can be calculated from
these two tables as follows:
Examples: Advanced mode, program code and stack located in external memory, on-chip
supporting modules accessed in two states with 8-bit bus width, external devices accessed in three
states with one wait state and 16-bit bus width.
1. BSET #0, @FFFFC7:8
2. JSR @@30
Rev.6.00 Sep. 27, 2007 Page 1022 of 1268
REJ09B0220-0600
From table A.5:
I = L = 2, J = K = M = N = 0
From table A.4:
S
Number of states required for execution = 2 × 4 + 2 × 2 = 12
From table A.5:
I = J = K = 2, L = M = N = 0
From table A.4:
S
Number of states required for execution = 2 × 4 + 2 × 4 + 2 × 4 = 24
Execution states = I × S
I
I
= 4, S
= S
J
Number of States Required for Instruction Execution
= S
L
K
= 2
= 4
I
+ J × S
J
+ K × S
K
+ L × S
L
+ M × S
M
+ N × S
N

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