D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 674

IC H8S/2300 MCU ROMLESS 128QFP

D12321VF25V

Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12321VF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Section 14 Serial Communication Interface (SCI)
In serial transmission, the SCI operates as described below.
[1] The SCI monitors the TDRE flag in SSR, and if is 0, recognizes that data has been written to
[2] After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts
[3] The SCI checks the TDRE flag at the timing for sending the stop bit.
Rev.6.00 Sep. 27, 2007 Page 642 of 1268
REJ09B0220-0600
TDR, and transfers the data from TDR to TSR.
transmission.
If the TIE bit is set to 1 at this time, a transmit-data-empty interrupt (TXI) is generated.
The serial transmit data is sent from the TxD pin in the following order.
[a] Start bit:
[b] Transmit data:
[c] Multiprocessor bit
[d] Stop bit(s):
[e] Mark state:
If the TDRE flag is cleared to 0, data is transferred from TDR to TSR, the stop bit is sent, and
then serial transmission of the next frame is started.
If the TDRE flag is set to 1, the TEND flag in SSR is set to 1, the stop bit is sent, and then the
mark state is entered in which 1 is output continuously. If the TEIE bit in SCR is set to 1 at this
time, a transmit-end interrupt (TEI) request is generated.
One 0-bit is output.
8-bit or 7-bit data is output in LSB-first order.
One multiprocessor bit (MPBT value) is output.
One or two 1-bits (stop bits) are output.
1 is output continuously until the start bit that starts the next transmission is sent.

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