D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 490

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 10 16-Bit Timer Pulse Unit (TPU)
Bits 7 to 4— I/O Control B3 to B0 (IOB3 to IOB0)
Channel
0
Note:
Rev.6.00 Sep. 27, 2007 Page 458 of 1268
REJ09B0220-0600
Bits IOB3 to IOB0 specify the function of TGRB.
Bits IOD3 to IOD0 specify the function of TGRD.
1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000 and φ/1 is used as the TCNT1
Bit 7
IOB3
0
1
count clock, this setting is invalid and input capture is not generated.
I/O Control D3 to D0 (IOD3 to IOD0):
Bit 6
IOB2
0
1
0
1
Bit 5
IOB1
0
1
0
1
0
1
*
Bit 4
IOB0 Description
0
*
0
1
0
1
1
0
1
0
1
*
TGR0B
is output
compare
register
TGR0B
is input
capture
register
Output disabled
Capture input
source is channel
1/count clock
Output disabled
Initial output is 0
output
Initial output is 1
output
Capture input
source is
TIOCB0 pin
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1
count-up/count-down *
0 output at compare match
1 output at compare match
Toggle output at compare
match
0 output at compare match
1 output at compare match
Toggle output at compare
match
(Initial value)
*: Don’t care
1