D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 913

IC H8S/2300 MCU ROMLESS 128QFP

D12321VF25V

Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12321VF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12321VF25V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
D12321VF25V
Manufacturer:
Renesas
Quantity:
675
Part Number:
D12321VF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 19 ROM
19.25.3 Erase Mode (n = 1 for addresses H'000000 to H'03FFFF and n = 2 for addresses
H'040000 to H'07FFFF)
Flash memory erasing should be performed block by block following the procedure shown in the
erase/erase-verify flowchart (single-block erase) shown in figure 19.71.
For the wait times (x, y, z, α, ß, γ, ε, η, θ) after bits are set or cleared in flash memory control
register n (FLMCRn) and the maximum number of programming operations (N), see section
22.2.6, Flash Memory Characteristics.
To perform data or program erasure, make a 1 bit setting for the flash memory area to be erased in
erase block register 1 or 2 (EBR1 or EBR2) at least (x) µs after setting the SWEn bit to 1 in flash
memory control register n (FLMCRn). Next, the watchdog timer is set to prevent overerasing in
the event of program runaway, etc. Set a value greater than (y + z + α + ß) ms as the WDT
overflow period. After this, preparation for erase mode (erase setup) is carried out by setting the
ESUn bit in FLMCRn, and after the elapse of (y) µs or more, the operating mode is switched to
erase mode by setting the En bit in FLMCRn. The time during which the En bit is set is the flash
memory erase time. Ensure that the erase time does not exceed (z) ms.
Note: With flash memory erasing, prewriting (setting all data in the memory to be erased to 0) is
not necessary before starting the erase procedure.
Rev.6.00 Sep. 27, 2007 Page 881 of 1268
REJ09B0220-0600

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