D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 902
![IC H8S/2300 MCU ROMLESS 128QFP](/photos/12/19/121977/d12321vf25v_sml.jpg)
D12321VF25V
Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of D12321VF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Section 19 ROM
19.24
When pins are set to on-board programming mode, program/erase/verify operations can be
performed on the on-chip flash memory. There are two on-board programming modes: boot mode
and user program mode. The pin settings for transition to each of these modes are shown in table
19.51. For a diagram of the transitions to the various flash memory modes, see figure 19.59.
Table 19.51 Setting On-Board Programming Modes
MCU Mode
Boot mode
User program mode *
Note: * Normally, user mode should be used. Set the FWE pin to 1 to make a transition to user
19.24.1 Boot Mode
When boot mode is used, the flash memory programming control program must be prepared in the
host beforehand. The channel 1 SCI to be used is set to asynchronous mode.
When a reset-start is executed after the H8S/2326 F-ZTAT chip’s pins have been set to boot mode,
the boot program built into the chip is started and the programming control program prepared in
the host is serially transmitted to the chip via the SCI. In the chip, the programming control
program received via the SCI is written into the programming control program area in on-chip
RAM. After the transfer is completed, control branches to the start address of the programming
control program area and the programming control program execution state is entered (flash
memory programming is performed).
The transferred programming control program must therefore include coding that follows the
programming algorithm given later.
The system configuration in boot mode is shown in figure 19.66, and the boot program mode
execution procedure in figure 19.67.
Rev.6.00 Sep. 27, 2007 Page 870 of 1268
REJ09B0220-0600
program mode before performing a program/erase/verify operation.
On-Board Programming Modes
CPU Operating Mode
Advanced expanded mode with
on-chip ROM enabled
Advanced single-chip mode
Advanced expanded mode with
on-chip ROM enabled
Advanced single-chip mode
Mode
FWE
1
1
MD2
0
1
Pins
MD1
1
1
MD0
0
1
0
1
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