D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 190

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 6 Bus Controller
Bit 5—External Address Enable (EAE): Selects whether addresses H'010000 to H'03FFFF *
to be internal addresses or external addresses.
Bit 5
0
1
Notes: 1. Do not access a reserved area.
Bit 4—Reserved: Only 1 should be written to this bit.
Bit 3—DACK Timing Select (DDS): Selects the DMAC single address transfer bus timing for
the DRAM interface. In the H8S/2321 this bit is reserved and should only be written with 1.
Bit 3
DDS
0
1
Bit 2—Reserved: Only 1 should be written to this bit.
Rev.6.00 Sep. 27, 2007 Page 158 of 1268
REJ09B0220-0600
2. Addresses H'010000 to H'05FFFF in the H8S/2329B.
3. H8S/2328B in F-ZTAT version.
H8S/2329B, H8S/2328 *
H8S/2326
On-chip ROM
Addresses H'010000 to H'03FFFF *
or reserved area *
Addresses H'010000 to H'07FFFF in the H8S/2326.
Description
When DMAC single address transfer is performed in DRAM space, full access is
always executed
DACK signal goes low from T
Burst access is possible when DMAC single address transfer is performed in DRAM
space
DACK signal goes low from T
1
in single-chip mode
3
,
H8S/2327
Addresses H'010000 to
H'01FFFF are on-chip
ROM or address H'020000
to H'03FFFF are reserved
area *
r
c1
or T
or T
1
2
1
are external addresses in external expanded mode
2
cycle
Description
cycle
H8S/2323
Reserved area *
(Initial value)
1
(Initial value)
2
are