D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 702

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 15 Smart Card Interface
15.1.4
Table 15.2 shows the registers used by the smart card interface. Details of SMR, BRR, SCR, TDR,
RDR, and MSTPCR are the same as for the normal SCI function: see the register descriptions in
section 14, Serial Communication Interface (SCI).
Table 15.2 Smart Card Interface Registers
Channel
0
1
2
All
Notes: 1. Lower 16 bits of the address.
Rev.6.00 Sep. 27, 2007 Page 670 of 1268
REJ09B0220-0600
2. Can only be written with 0 for flag clearing.
Register Configuration
Name
Serial mode register 0
Bit rate register 0
Serial control register 0
Transmit data register 0
Serial status register 0
Receive data register 0
Smart card mode register 0
Serial mode register 1
Bit rate register 1
Serial control register 1
Transmit data register 1
Serial status register 1
Receive data register 1
Smart card mode register 1
Serial mode register 2
Bit rate register 2
Serial control register 2
Transmit data register 2
Serial status register 2
Receive data register 2
Smart card mode register 2
Module stop control register
SMR0
SCR0
TDR0
SSR0
RDR0
SCMR0
SMR1
SCR1
TDR1
SSR1
RDR1
SCMR1
SMR2
SCR2
TDR2
SSR2
RDR2
SCMR2
MSTPCR
Abbreviation
BRR0
BRR1
BRR2
R/W
R/W
R/W
R/W
R/W
R/(W) *
R
R/W
R/W
R/W
R/W
R/W
R/(W) *
R
R/W
R/W
R/W
R/W
R/W
R/(W) *
R
R/W
R/W
2
2
2
Initial Value
H'00
H'FF
H'00
H'FF
H'84
H'00
H'F2
H'00
H'FF
H'00
H'FF
H'84
H'00
H'F2
H'00
H'FF
H'00
H'FF
H'84
H'00
H'F2
H'3FFF
Address *
H'FF78
H'FF79
H'FF7A
H'FF7B
H'FF7C
H'FF7D
H'FF7E
H'FF80
H'FF81
H'FF82
H'FF83
H'FF84
H'FF85
H'FF86
H'FF88
H'FF89
H'FF8A
H'FF8B
H'FF8C
H'FF8D
H'FF8E
H'FF3C
1