D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 581

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

11.3.4
Sample Setup Procedure for Non-Overlapping Pulse Output: Figure 11.6 shows a sample
procedure for setting up non-overlapping pulse output.
PPG setup
TPU setup
TPU setup
Figure 11.6 Setup Procedure for Non-Overlapping Pulse Output (Example)
Non-Overlapping Pulse Output
Set non-overlapping groups
Set counting operation
Select interrupt request
Set initial output data
Select TGR functions
Select output trigger
Enable pulse output
Compare match?
Non-overlapping
Set TGR values
Set next pulse
Set next pulse
PPG output
output data
output data
Start count
Yes
No
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
Section 11 Programmable Pulse Generator (PPG)
[1] Set TIOR to make TGRA and
[2] Set the pulse output trigger period
[3] Select the counter clock source
[4] Enable the TGIA interrupt in TIER.
[5] Set the initial output values in
[6] Set the DDR and NDER bits for the
[7] Select the TPU compare match
[8] In PMR, select the groups that will
[9] Set the next pulse output values in
[10] Set the CST bit in TSTR to 1 to
[11] At each TGIA interrupt, set the next
Note:* The DMAC is not supported in
Rev.6.00 Sep. 27, 2007 Page 549 of 1268
TGRB an output compare registers
(with output disabled).
in TGRB and the non-overlap
margin in TGRA.
with bits TPSC2 to TPSC0 in TCR.
Select the counter clear source
with bits CCLR1 and CCLR0.
The DTC or DMAC* can also be
set up to transfer data to NDR.
PODR.
pins to be used for pulse output to
1.
event to be used as the pulse
output trigger in PCR.
operate in non-overlap mode.
NDR.
start the TCNT counter.
output values in NDR.
the H8S/2321.
REJ09B0220-0600