D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 426

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 9 I/O Ports
9.8
9.8.1
Port A is an 8-bit I/O port. Port A pins also function as address bus outputs and interrupt input
pins (IRQ
input can be switched to P5
or port output function can be selected by means of bits A23E to A20E in PFCR1.
Port A has a built-in MOS input pull-up function that can be controlled by software. Pins PA
PA
Figure 9.7 shows the port A pin configuration.
Rev.6.00 Sep. 27, 2007 Page 394 of 1268
REJ09B0220-0600
4
are Schmitt-triggered inputs.
4
Port A
Overview
to IRQ
Pin functions in mode 6
PA
PA
PA
PA
PA
PA
PA
PA
Port A
7
6
5
4
3
2
1
0
(I/O) / A
(I/O) / A
(I/O) / A
(I/O) / A
(input) / A
(input) / A
(input) / A
(input) / A
7
). The pin functions change according to the operating mode. IRQ
23
22
21
20
19
18
17
16
(output) / IRQ
(output) / IRQ
(output) / IRQ
(output) / IRQ
(output)
(output)
(output)
(output)
0
to P5
Port A pins
PA
PA
PA
PA
PA
PA
PA
PA
7
6
5
4
3
2
1
0
Figure 9.7 Port A Pin Functions
/ A
/ A
/ A
/ A
/ A
/ A
/ A
/ A
3
23
22
21
20
19
18
17
16
by setting the IRQPAS bit in SYSCR to 1. The address output
7
6
5
4
/ IRQ
/ IRQ
/ IRQ
/ IRQ
(input)
(input)
(input)
(input)
7
6
5
4
Pin functions in modes 4 and 5
PA
PA
PA
PA
A
A
A
A
Pin functions in mode 7
PA
PA
PA
PA
PA
PA
PA
PA
19
18
17
16
7
6
5
4
7
6
5
4
3
2
1
0
(output)
(output)
(output)
(output)
(I/O) / A
(I/O) / A
(I/O) / A
(output) / A
(I/O) / IRQ
(I/O) / IRQ
(I/O) / IRQ
(I/O) / IRQ
(I/O)
(I/O)
(I/O)
(I/O)
23
22
21
(output) / IRQ
(output) / IRQ
(output) / IRQ
7
6
5
4
20
(input)
(input)
(input)
(input)
(output)
6
7
5
(input)
(input)
(input)
4
to IRQ
7
7
to