D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 113

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

3.2.2
Bit 7—Reserved: Only 0 should be written to this bit.
Bit 6—Reserved: This bit is always read as 0, and cannot be modified.
Bits 5 and 4—Interrupt Control Mode 1 and 0 (INTM1, INTM0): These bits select the control
mode of the interrupt controller. For details of the interrupt control modes, see section 5.4.1,
Interrupt Control Modes and Interrupt Operation.
Bit 5
INTM1
0
1
Bit 3—NMI Edge Select (NMIEG): Selects the valid edge of the NMI interrupt input.
Bit 3
NMIEG
0
1
Bit 2—LWR Output Disable (LWROD): Enables or disables LWR output.
Bit 2
LWROD
0
1
Bit
Initial value :
R/W
System Control Register (SYSCR)
Bit 4
INTM0
0
1
0
1
Description
An interrupt is requested at the falling edge of NMI input
An interrupt is requested at the rising edge of NMI input
Description
PF
PF
:
:
3
3
is designated as LWR output pin
is designated as I/O port, and does not function as LWR output pin
R/W
—
7
0
Interrupt Control
Mode
0
—
2
—
—
—
6
0
INTM1
R/W
5
0
Description
Control of interrupts by I bit
Setting prohibited
Control of interrupts by I2 to I0 bits and IPR
Setting prohibited
INTM0
R/W
4
0
Rev.6.00 Sep. 27, 2007 Page 81 of 1268
NMIEG
R/W
3
0
Section 3 MCU Operating Modes
LWROD IRQPAS
R/W
2
0
REJ09B0220-0600
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
RAME
R/W
0
1