D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 1243

IC H8S/2300 MCU ROMLESS 128QFP

D12321VF25V

Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12321VF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12321VF25V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
D12321VF25V
Manufacturer:
Renesas
Quantity:
675
Part Number:
D12321VF25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
TSR1—Timer Status Register 1
Bit
Initial value
Read/Write
Note: * Can only be written with 0 for flag clearing.
:
:
:
Count Direction Flag
TCFD
0
1
R
7
1
TCNT counts down
TCNT counts up
6
1
Underflow Flag
R/(W)*
TCFU
0
1
5
0
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
[Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
R/(W)*
Overflow Flag
TCFV
0
1
4
0
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
3
0
Input Capture/Output Compare Flag B
0
1
2
0
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL
• When 0 is written to TGFB after reading TGFB = 1
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
bit of MRB in DTC is 0
output compare register
capture signal while TGRB is functioning as input
capture register
R/(W)*
Rev.6.00 Sep. 27, 2007 Page 1211 of 1268
TGFB
H'FFE5
1
0
Note: 1. The DMAC is not supported in the H8S/2321.
Input Capture/Output Compare Flag A
0
1
R/(W)*
TGFA
0
0
[Clearing conditions]
• When DTC is activated by TGIA interrupt while
• When DMAC
• When 0 is written to TGFA after reading
[Setting conditions]
• When TCNT = TGRA while TGRA is functioning
• When TCNT value is transferred to TGRA by
Appendix B Internal I/O Registers
DISEL bit of MRB in DTC is 0
while DTA bit of DMABCR in DMAC
TGFA = 1
as output compare register
input capture signal while TGRA is functioning
as input capture register
*1
is activated by TGIA interrupt
REJ09B0220-0600
*1
is 1
TPU1

Related parts for D12321VF25V