D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 449

IC H8S/2300 MCU ROMLESS 128QFP

D12321VF25V

Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12321VF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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9.11.2
Table 9.20 shows the port D register configuration.
Table 9.20 Port D Registers
Name
Port D data direction register
Port D data register
Port D register
Port D MOS pull-up control register
Note: * Lower 16 bits of the address.
Port D Data Direction Register (PDDDR)
PDDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port D. PDDDR cannot be read; if it is, an undefined value will be read.
PDDDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Bit
Initial value :
R/W
The input/output direction specification by PDDDR is ignored, and port D is automatically
designated for data I/O.
Setting a PDDDR bit to 1 makes the corresponding port D pin an output port, while clearing
the bit to 0 makes the pin an input port.
Modes 4 to 6
Mode 7
Register Configuration
:
:
PD7DDR PD6DDR PD5DDR PD4DDR PD3DDR PD2DDR PD1DDR PD0DDR
W
7
0
W
6
0
Abbreviation
PDDDR
PDDR
PORTD
PDPCR
W
5
0
W
4
0
Rev.6.00 Sep. 27, 2007 Page 417 of 1268
R/W
W
R/W
R
R/W
W
3
0
Initial Value
H'00
H'00
Undefined
H'00
W
2
0
Section 9 I/O Ports
REJ09B0220-0600
W
1
0
Address *
H'FEBC
H'FF6C
H'FF5C
H'FF73
W
0
0

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