D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 225
D12321VF25V
Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of D12321VF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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RAS Down Mode and RAS Up Mode: Even when burst operation is selected, it may happen that
access to DRAM space is not continuous, but is interrupted by access to another space. In this
case, if the RAS signal is held low during the access to the other space, burst operation can be
resumed when the same row address in DRAM space is accessed again.
•
To select RAS down mode, set the RCDM bit in MCR to 1. If access to DRAM space is
interrupted and another space is accessed, the RAS signal is held low during the access to the
other space, and burst access is performed if the row address of the next DRAM space access
is the same as the row address of the previous DRAM space access. Figure 6.21 shows an
example of the timing in RAS down mode.
Note, however, that the RAS signal will go high if a refresh operation interrupts RAS down
mode.
RAS down mode
CAS, LCAS
CSn (RAS)
D
Note: n = 2 to 5
A
15
23
to A
to D
φ
0
0
Figure 6.21 Example of Operation Timing in RAS Down Mode
T
p
DRAM access
T
r
T
c1
T
c2
Rev.6.00 Sep. 27, 2007 Page 193 of 1268
External space
T
1
access
T
2
Section 6 Bus Controller
DRAM access
T
c1
REJ09B0220-0600
T
c2
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