D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 1215

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

ADCSR—A/D Control/Status Register
Bit
Initial value
Read/Write
Notes: 1. Can only be written with 0 for flag clearing.
A/D End Flag
0
1
[Clearing conditions]
• When 0 is written to the ADF flag after reading ADF = 1
• When the DMAC
[Setting conditions]
• Single mode: When A/D conversion ends
• Scan mode: When A/D conversion ends on all specified channels
2. The DMAC is not supported in the H8S/2321.
:
:
:
R/(W)
ADF
7
0
*1
*2
or DTC is activated by an ADI interrupt, and ADDR is read
A/D Interrupt Enable
ADIE
0
1
R/W
6
0
A/D conversion end interrupt request disabled
A/D conversion end interrupt request enabled
A/D Start
0
1
ADST
R/W
5
0
• Single mode: A/D conversion is started. Cleared to 0
• Scan mode: A/D conversion is started. Conversion continues
A/D conversion stopped
automatically when conversion ends
sequentially on the selected channels until ADST is cleared to
0 by software, a reset, or transition to standby mode or
module stop mode
Scan Mode
0
1
Clock Select
Note: CKS is used in combination with bit 3 (CKS1)
SCAN
R/W
Single mode
Scan mode
4
0
Channel Select
Note: These bits select the analog input channels.
Selection
Group
of ADCR.
See ADCR—A/D Control Register
H'FF99 A/D Converter.
CH2
Rev.6.00 Sep. 27, 2007 Page 1183 of 1268
0
1
H'FF98
Ensure that conversion is halted (ADST = 0)
before making a channel selection.
CKS
R/W
3
0
CH1
Selection
0
1
0
1
Channel
Appendix B Internal I/O Registers
CH0
CH2
R/W
0
1
0
1
0
1
0
1
2
0
AN
(Initial value)
AN
AN
AN
AN
AN
AN
AN
Single Mode
(SCAN = 0)
0
1
2
3
4
5
6
7
CH1
R/W
1
0
REJ09B0220-0600
AN
AN
AN
AN
AN
AN
AN
AN
(SCAN = 1)
Scan Mode
A/D Converter
CH0
R/W
0
0
0
0
4
4
4
4
, AN
, AN
0
0
to AN
to AN
to AN
to AN
1
5
2
3
6
7