D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 259

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

7.2.4
DMACR is an 8-bit readable/writable register that controls the operation of each DMAC channel.
DMACR is initialized to H'00 by a reset, and in standby mode.
Bit 7—Data Transfer Size (DTSZ): Selects the size of data to be transferred at one time.
Bit 7
DTSZ
0
1
Bit 6—Data Transfer Increment/Decrement (DTID): Selects incrementing or decrementing of
MAR after every data transfer in sequential mode or repeat mode.
In idle mode, MAR is neither incremented nor decremented.
Bit 6
DTID
0
1
Bit
Initial value :
R/W
DMA Control Register (DMACR)
Description
Byte-size transfer
Word-size transfer
Description
MAR is incremented after a data transfer
•
•
MAR is decremented after a data transfer
•
•
:
:
When DTSZ = 0, MAR is incremented by 1 after a transfer
When DTSZ = 1, MAR is incremented by 2 after a transfer
When DTSZ = 0, MAR is decremented by 1 after a transfer
When DTSZ = 1, MAR is decremented by 2 after a transfer
DTSZ
R/W
7
0
DTID5
R/W
6
0
Section 7 DMA Controller (Not Supported in the H8S/2321)
RPE
R/W
5
0
DTDIR
R/W
4
0
Rev.6.00 Sep. 27, 2007 Page 227 of 1268
DTF3
R/W
3
0
DTF2
R/W
2
0
REJ09B0220-0600
DTF1
R/W
1
0
(Initial value)
(Initial value)
DTF0
R/W
0
0