D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 916

IC H8S/2300 MCU ROMLESS 128QFP

D12321VF25V

Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of D12321VF25V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Quantity:
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Section 19 ROM
19.26
There are three kinds of flash memory program/erase protection: hardware protection, software
protection, and error protection.
19.26.1 Hardware Protection
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted. Settings in flash memory control registers 1 and 2 (FLMCR1, FLMCR2) and
erase block registers 1 and 2 (EBR1, EBR2) are reset (see table 19.53).
Table 19.53 Hardware Protection
Item
FWE pin protection
Reset/standby
protection
19.26.2 Software Protection
Software protection can be implemented by setting the SWE1 bit in flash memory control register
1 (FLMCR1), SWE2 bit in FLMCR2 erase block registers 1 and 2 (EBR1, EBR2), and the RAMS
bit in the RAM emulation register (RAMER). When software protection is in effect, setting the P1
or E1 bit in FLMCR1, or the P2 or E2 bit in FLMCR2 does not cause a transition to program
mode or erase mode (see table 19.54).
Rev.6.00 Sep. 27, 2007 Page 884 of 1268
REJ09B0220-0600
Flash Memory Protection
Description
When a low level is input to the FWE pin,
FLMCR1, FLMCR2, EBR1, and EBR2 are
initialized and the program/erase protected
state is entered.
In a reset (including a WDT overflow reset)
and in standby mode, FLMCR1, FLMCR2,
EBR1, and EBR2 are initialized, and the
program/erase-protected state is entered.
In a reset via the RES pin, the reset state is
not entered unless the RES pin is held low
until oscillation stabilizes after powering on.
In the case of a reset during operation, hold
the RES pin low for the RES pulse width
specified in section 22.2.3, AC
Characteristics.
Program
Yes
Yes
Functions
Erase
Yes
Yes

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