D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 219
D12321VF25V
Manufacturer Part Number
D12321VF25V
Description
IC H8S/2300 MCU ROMLESS 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets
1.HEWH8E10A.pdf
(19 pages)
2.D12312SVTE25V.pdf
(341 pages)
3.D12322RVF25V.pdf
(1304 pages)
Specifications of D12321VF25V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
86
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Company:
Part Number:
D12321VF25V
Manufacturer:
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Quantity:
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Company:
Part Number:
D12321VF25V
Manufacturer:
Renesas
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6.5.7
When DRAM is accessed, an RAS precharging time must be secured. With the chip, one T
is always inserted when DRAM space is accessed. This can be changed to two T
the TPC bit in MCR to 1. Set the appropriate number of T
connected and the operating frequency of the chip. Figure 6.16 shows the timing when two T
states are inserted.
When the TCP bit is set to 1, two T
Read
Write
Note: n = 2 to 5
Precharge State Control
CAS, LCAS
CSn (RAS)
HWR (WE)
HWR (WE)
D
A
D
15
23
15
to D
to D
to A
φ
0
0
0
Figure 6.16 Timing with 2-State Precharge Cycle
T
p1
p
states are also used for refresh cycles.
T
p2
Rev.6.00 Sep. 27, 2007 Page 187 of 1268
Row
T
p
r
cycles according to the DRAM
Column
T
c1
Section 6 Bus Controller
REJ09B0220-0600
p
states by setting
T
c2
p
state
p
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