D12321VF25V Renesas Electronics America, D12321VF25V Datasheet - Page 60

• Manufacturer Part Number: D12321VF25V
• Description: IC H8S/2300 MCU ROMLESS 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of D12321VF25V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: EDK2329 - DEV EVALUATION KIT H8S/2329
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 1 Overview
Type
Bus control
DMA controller
(DMAC) *
16-bit timer
pulse unit
(TPU)
Rev.6.00 Sep. 27, 2007 Page 28 of 1268
REJ09B0220-0600
3
Symbol
CAS *
LCAS *
WAIT
DREQ
DREQ
TEND
TEND
DACK
DACK
TCLKD to
TCLKA
TIOCA
TIOCB
TIOCC
TIOCD
TIOCA
TIOCB
TIOCA
TIOCB
TIOCA
TIOCB
TIOCC
TIOCD
4
1
0
1
0
1
0
0
0
1
1
2
2
3
3
4
,
0
0
3
3
,
,
,
,
,
,
,
,
,
,
TFP-120
116
86
86, 92
62, 60
63, 61
111, 112
105, 107,
109, 110
112 to
109
108, 107
106, 105
71 to 68
Pin No.
FP-128B I/O
126
94
94, 102
70, 66
71, 69
121, 122
115, 117,
119, 120
122 to
119
118, 117
116, 115
79 to 76
Output Upper column address strobe/
Output Lower column address strobe: The
Input
Input
Output DMA transfer end 1 and 0: These
Output DMA transfer acknowledge 1 and
Input
I/O
I/O
I/O
I/O
Name and Function
column address strobe: The 2-CAS
type DRAM upper column address
strobe signal.
2-CAS type DRAM lower column
address strobe signal.
Wait: Requests insertion of a wait
state in the bus cycle when
accessing external 3-state access
space.
DMA request 1 and 0: These pins
request DMAC activation.
pins indicate the end of DMAC data
transfer.
0: These are the DMAC single
address transfer acknowledge pins.
Clock input D to A: These pins input
an external clock.
Input capture/output compare
match A0 to D0: The TGR0A to
TGR0D input capture input or output
compare output, or PWM output pins.
Input capture/output compare
match A1 and B1: The TGR1A and
TGR1B input capture input or output
compare output, or PWM output pins.
Input capture/output compare
match A2 and B2: The TGR2A and
TGR2B input capture input or output
compare output, or PWM output pins.
Input capture/output compare
match A3 to D3: The TGR3A to
TGR3D input capture input or output
compare output, or PWM output pins.