EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 112

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.5.19 CMU_SYNCBUSY - Synchronization Busy Register
11.5.20 CMU_FREEZE - Freeze Register
31:7
6
5
4
3
2
1
0
Offset
0x050
Reset
Access
Name
Bit
Offset
0x054
Reset
Access
Name
2010-09-06 - d0001_Rev1.00
Reserved
LFBPRESC0
Used to check the synchronization status of CMU_LFBPRESC0.
Reserved
LFBCLKEN0
Used to check the synchronization status of CMU_LFBCLKEN0.
Reserved
LFAPRESC0
Used to check the synchronization status of CMU_LFAPRESC0.
Reserved
LFACLKEN0
Used to check the synchronization status of CMU_LFACLKEN0.
Name
Value
1
Value
0
1
Value
0
1
Value
0
1
Description
CMU_LFBPRESC0 is busy synchronizing new value
Description
CMU_LFBCLKEN0 is ready for update
CMU_LFBCLKEN0 is busy synchronizing new value
Description
CMU_LFAPRESC0 is ready for update
CMU_LFAPRESC0 is busy synchronizing new value
Description
CMU_LFACLKEN0 is ready for update
CMU_LFACLKEN0 is busy synchronizing new value
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
R
R
R
R
Access
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112
Bit Position
Bit Position
Low Frequency B Prescaler 0 Busy
Low Frequency B Clock Enable 0 Busy
Low Frequency A Prescaler 0 Busy
Low Frequency A Clock Enable 0 Busy
Description
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