EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 184

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2010-09-06 - d0001_Rev1.00
Figure 16.5 (p. 184) . With OVS=0 in USARTn_CTRL, the start and data bits are thus sampled at
locations 8, 9 and 10 in the figure, locations 4, 5 and 6 for OVS=1 and locations 3, 4, and 5 for OVS=2.
The value of a sampled bit is determined by majority vote. If two or more of the three bit-samples are
high, the resulting bit value is high. If the majority is low, the resulting bit value is low.
Majority vote is used for all oversampling modes except 4x oversampling. In this mode, a single sample
is taken at position 3 as shown in Figure 16.5 (p. 184) .
If the value of the start bit is found to be high, the reception of the frame is aborted, filtering out false
start bits possibly generated by noise on the input.
Figure 16.5. USART Sampling of Start and Data Bits
If the baud rate of the transmitter and receiver differ, the location each bit is sampled will be shifted
towards the previous or next bit in the frame. This is acceptable for small errors in the baud rate, but for
larger errors, it will result in transmission errors.
When the number of stop bits is 1 or more, stop bits are sampled like the start and data bits as seen in
Figure 16.6 (p. 184) . When a stop bit has been detected by sampling at positions 8, 9 and 10 for normal
mode, or 4, 5 and 6 for smart mode, the USART is ready for a new start bit. As seen in Figure 16.6 (p.
184) , a stop-bit of length 1 normally ends at c, but the next frame will be received correctly as long as
the start-bit comes after position a for OVS=0 and OVS=3, and b for OVS=1 and OVS=2.
Figure 16.6. USART Sampling of Stop Bits when Number of Stop Bits are 1 or More
0
Idle
0
13 14 15 16 1
7
4
0
0
n’th bit
0
6
8
1
1
1
1
2
1
1
1
3
2
2
2
4
3
2
5
3
2
1 stop bit
2
4
6
3
5
3
2
7
4
6
Start bit
3
8
7
4
9 10 11 12 13 14 15 16 1
5
4
3
8
9 10 0/1
5
4
3
6
a
5
...the world's most energy friendly microcontrollers
6
184
5
7
4
X
b
0/1
0/1
X
6
8
X
0/1
X
X
1
1
1
X
c
2
1
1
Idle or start bit
3
2
2
4
5
3
2
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6
3
7
4
8
Bit 0
9 10 11
5
4
3
6
5
12
13
7
4