EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 24

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

2010-09-06 - d0001_Rev1.00
When debug access is locked, the debug interface remains accessible, but the connection to the Cortex-
M3 core is blocked. This mechanism is controlled by the Authentication Access Port (AAP) as illustrated
by Figure 6.1 (p. 24) .
Figure 6.1. AAP - Authentication Access Port
The device is unlocked by writing to the AAP_CMDKEY register and then setting the DEVICEERASE
bit of the AAP_CMD register via the debug interface. This erase operation erases the main block, all
lock bits are reset and debug access through the AHB-AP is enabled. The operation takes 40 ms to
complete. Note that the SRAM contents will also be deleted during a device erase.
The debugger may read the status from the AAP_STATUS register. When the ERASEBUSY bit is set
low after DEVICEERASE of the AAP_CMD register is set, the debugger may set the SYSRESETREQ
bit in the AAP_CMD register. After reset, the debugger may resume a normal debug session through
the AHB-AP.
Note
SerialWire
interface
debug
If the debug pins are reconfigured for other I/O purposes than debug, a device erase may
no longer be executed. The pins are configured for debug in their reset state.
SW-DP
Authentication
Access Port
(AAP)
Cor t e x- M 3
AHB-AP
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24
DEVICEERASE
ERASEBUSY
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