EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 14

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

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Figure 5.1. System Address Space
The embedded SRAM is located at address 0x20000000 in the memory map of the EFM32G. When
running code located in SRAM starting at this address, the Cortex-M3 uses the System bus interface to
fetch instructions. This results in reduced performance as the Cortex-M3 accesses stack, other data in
SRAM and peripherals using the System bus interface. To be able to run code from SRAM efficiently,
the SRAM is also mapped in the code space at address 0x10000000. When running code from this
space, the Cortex-M3 fetches instructions through the I/D-Code bus interface, leaving the System bus
interface for data access.
5.2.1 Bit-banding
The SRAM bit-band alias and peripheral bit-band alias regions are located at 0x22000000 and
0x42000000 respectively. Read and write operations to these regions are converted into masked single-
bit reads and atomic single-bit writes to the embedded SRAM and peripherals of the EFM32G.
Using a standard approach to modify a single register or SRAM bit in the aliased regions, would require
software to read the value of the byte, half-word or word containing the bit, modify the bit, and then
write the byte, half-word or word back to the register or SRAM address. Using bit-banding, this can be
done in a single operation. As read-writeback, bit-masking and bit-shift operations are not necessary in
software, code size is reduced and execution speed improved.
The bit-band regions allow each bit in the SRAM and Peripheral areas of the memory map to be
addressed. To set or clear a bit in the embedded SRAM, write a 1 or a 0 to the following address:
Memory SRAM Area Set/Clear Bit
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2010-09-06 - d0001_Rev1.00
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