EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 165

MCU 32BIT 16KB FLASH 32-QFN

EFM32G200F16

Manufacturer Part Number
EFM32G200F16
Description
MCU 32BIT 16KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets

Specifications of EFM32G200F16

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
15.5.2 I2Cn_CMD - Command Register
1
0
31:8
7
6
5
4
3
2
1
0
Bit
Offset
0x004
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
SLAVE
Set this bit to allow the device to be selected as an I
EN
Use this bit to enable or disable the I
Reserved
CLEARPC
Set to clear pending commands.
CLEARTX
Set to clear transmit buffer and shift register. Will not abort ongoing transfer.
ABORT
Abort the current transmission making the bus go idle. When used in combination with STOP, a STOP condition is sent as soon as
possible before aborting the transmission. The stop condition is subject to clock synchronization.
CONT
Set to continue transmission after a NACK has been received.
NACK
Set to transmit a NACK the next time an acknowledge is required.
ACK
Set to transmit an ACK the next time an acknowledge is required.
STOP
Set to send stop condition as soon as possible.
START
Set to send start condition as soon as possible. If a transmission is ongoing and not owned, the start condition will be sent as soon
as the bus is idle. If the current transmission is owned by this module, a repeated start condition will be sent. Use in combination with
a STOP command to automatically send a STOP, then a START when the bus becomes idle.
Name
Name
Value
0
1
Value
0
1
Value
0
1
Description
Software must give one ACK command for each ACK transmitted on the I
Addresses that are not automatically NACK'ed, and all data is automatically acknowledged.
Description
All addresses will be responded to with a NACK
Addresses matching the programmed slave address or the general call address (if enabled) require a response from
software. Other addresses are automatically responded to with a NACK.
Description
The I
The I
0
0
0
0
0
0
0
0
0
0
Reset
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
2
2
C module is disabled. And its internal state is cleared
C module is enabled.
2
C module.
RW
RW
W1
W1
W1
W1
W1
W1
W1
W1
Access
Access
2
C slave.
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165
Bit Position
Addressable as Slave
I
Clear Pending Commands
Clear TX
Abort transmission
Continue transmission
Send NACK
Send ACK
Send stop condition
Send start condition
Description
Description
2
C Enable
2
C bus.
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