EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 377

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

27 AES - Advanced Encryption Standard Accelerator
27.1 Introduction
27.2 Features
27.3 Functional Description
2010-09-06 - d0001_Rev1.00
The Advanced Encryption Standard (FIPS-197) is a symmetric block cipher operating on 128-bit blocks
of data and 128-, 192- or 256-bit keys.
The AES accelerator performs AES encryption and decryption with 128-bit or 256-bit keys. Encrypting or
decrypting one 128-bit data block takes 54 HFCORECLK cycles with 128-bit keys and 75 HFCORECLK
cycles with 256-bit keys. The AES module is an AHB slave which enables efficient access to the data
and key registers. All write accesses to the AES module must be 32-bit operations, i.e. 8- or 16-bit
operations are not supported.
• AES hardware encryption/decryption
• Efficient CPU/DMA support
• Interrupt on finished encryption/decryption
• DMA request on finished encryption/decryption
• Key buffer in AES128 mode
• Optional XOR on Data write
Some data and a key must be loaded into the KEY and DATA registers before an encryption or decryption
can take place. The input data before encryption is called the PlainText and output from the encryption
is called CipherText. For encryption, the key is called PlainKey. After one encryption, the resulting key
in the KEY registers is the CipherKey. This key must be loaded into the KEY registers before every
decryption. After one decryption, the resulting key will be the PlainKey. The resulting PlainKey/CipherKey
is only dependent on the value in the KEY registers before encryption/decryption. The resulting keys
and data are shown in Figure 27.1 (p. 378) .
0 1 2 3
• 128-bit key (54 HFCORECLK cycles)
• 256-bit key (75 HFCORECLK cycles)
How are you?
4
I am fine
AES
AES
& G# %5
! T4/# 2
...the world's most energy friendly microcontrollers
377
What?
A fast and energy efficient hardware
accelerator for AES-128 and AES-256
encryption and decryption.
Why?
Efficient encryption/decryption with little or
no CPU intervention helps to meet the speed
and energy demands of the application.
How?
High AES throughput allows the EFM32G to
spend more time in lower energy modes. In
addition, specialized data access functions
allow autonomous DMA/AES operation in
both EM0 and EM1.
Quick Facts
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