EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 64

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.7.9 DMA_CHREQMASKS - Channel Request Mask Set Register
31:8
7
6
5
4
3
2
1
0
31:8
7
6
5
4
3
2
1
Bit
Offset
0x020
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
Reserved
CH7USEBURSTC
Write to 1 to disable useburst setting for this channel.
CH6USEBURSTC
Write to 1 to disable useburst setting for this channel.
CH5USEBURSTC
Write to 1 to disable useburst setting for this channel.
CH4USEBURSTC
Write to 1 to disable useburst setting for this channel.
CH3USEBURSTC
Write to 1 to disable useburst setting for this channel.
CH2USEBURSTC
Write to 1 to disable useburst setting for this channel.
CH1USEBURSTC
Write to 1 to disable useburst setting for this channel.
CH0USEBURSTC
Write to 1 to disable useburst setting for this channel.
Reserved
CH7REQMASKS
Write to 1 to disable peripheral requests for this channel.
CH6REQMASKS
Write to 1 to disable peripheral requests for this channel.
CH5REQMASKS
Write to 1 to disable peripheral requests for this channel.
CH4REQMASKS
Write to 1 to disable peripheral requests for this channel.
CH3REQMASKS
Write to 1 to disable peripheral requests for this channel.
CH2REQMASKS
Write to 1 to disable peripheral requests for this channel.
CH1REQMASKS
Name
Name
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
W1
W1
W1
W1
W1
W1
W1
W1
RW1
RW1
RW1
RW1
RW1
RW1
RW1
Access
Access
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Bit Position
64
Channel 7 Useburst Clear
Channel 6 Useburst Clear
Channel 5 Useburst Clear
Channel 4 Useburst Clear
Channel 3 Useburst Clear
Channel 2 Useburst Clear
Channel 1 Useburst Clear
Channel 0 Useburst Clear
Channel 7 Request Mask Set
Channel 6 Request Mask Set
Channel 5 Request Mask Set
Channel 4 Request Mask Set
Channel 3 Request Mask Set
Channel 2 Request Mask Set
Channel 1 Request Mask Set
Description
Description
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