EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 251

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.3.2.4 Compare
2010-09-06 - d0001_Rev1.00
Figure 19.14. TIMER Period and/or Pulse width Capture
Each Compare/Capture channel contains a comparator which outputs a compare match if the contents
of TIMERn_CCx_CCV matches the counter value, see Figure 19.15 (p. 251) . In compare mode, each
compare channel can be configured to either set, clear or toggle the output on an event (compare match,
overflow or underflow). The output from each channel is represented as an alternative function on the
port it is connected to, which needs to be enabled for the CC outputs to propagate to the pins.
Figure 19.15. TIMER Block Diagram Showing Comparison Functionality
If occurring in the same cycle, match action will have priority over overflow or underflow action.
The input selected (through PRSSEL, INSEL and FILTSEL in TIMERn_CCx_CTRL) for the CC channel
will also be sampled on compare match and the result is found in the CCPOL bits in TIMERn_STATUS.
The COIST bit in TIMERn_CCx_CTRL is the initial state of the compare/PWM output. Also the resulting
output can be inverted by setting OUTINV in TIMERn_CCx_CTRL. It is recommended to turn off the CC
channel before configuring the output state to avoid any pulses on the output. The CC channel can be
turned off by setting MODE to OFF in TIMER_CCx_CTRL.
Figure 19.16. TIMER Output Logic
Note: For sim plicity, all
TIMERn_CCx registers are
grouped together in the figure,
but they all have individual
Com pare Register and logic
Input Capture (pulse-width capture)
Com pare/
Input Capture (frequency capture)
PWM x
COIST
Output
CNTCLK
OUTINV
0
1
Clear& Start
TnCCR0[ 15:0
TnCCR1[ 15:0
TIMERn_CNT
TIMERn_CCx
Input
CNT
TIMn_CCx
]
]
0
Condition
Update
= =
=
TIMERn_TOP
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= 0
251
=
Com pare and
Com pare and
Com pare and
PWM config
PWM config
PWM config
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Overflow
Underflow
Com pare Match x
TIMn_CC0
TIMn_CC1
TIMn_CC2