EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 171

MCU 32BIT 16KB FLASH 32-QFN

EFM32G200F16

Manufacturer Part Number
EFM32G200F16
Description
MCU 32BIT 16KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets

Specifications of EFM32G200F16

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
15.5.13 I2Cn_IFC - Interrupt Flag Clear Register
16
15
14
13
12
11
10
9
8
7
6
5:4
3
2
1
0
31:17
16
Bit
Offset
0x030
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
SSTOP
Write to 1 to set the SSTOP interrupt flag.
CLTO
Write to 1 to set the CLTO interrupt flag.
BITO
Write to 1 to set the BITO interrupt flag.
RXUF
Write to 1 to set the RXUF interrupt flag.
TXOF
Write to 1 to set the TXOF interrupt flag.
BUSHOLD
Write to 1 to set the BUSHOLD interrupt flag.
BUSERR
Write to 1 to set the BUSERR interrupt flag.
ARBLOST
Write to 1 to set the ARBLOST interrupt flag.
MSTOP
Write to 1 to set the MSTOP interrupt flag.
NACK
Write to 1 to set the NACK interrupt flag.
ACK
Write to 1 to set the ACK interrupt flag.
Reserved
TXC
Write to 1 to set the TXC interrupt flag.
ADDR
Write to 1 to set the ADDR interrupt flag.
RSTART
Write to 1 to set the RSTART interrupt flag.
START
Write to 1 to set the START interrupt flag.
Reserved
SSTOP
Name
Name
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
W1
Access
Access
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171
Bit Position
Set SSTOP Interrupt Flag
Set Clock Low Interrupt Flag
Set Bus Idle Timeout Interrupt Flag
Set Receive Buffer Underflow Interrupt Flag
Set Transmit Buffer Overflow Interrupt Flag
Set Bus Held Interrupt Flag
Set Bus Error Interrupt Flag
Set Arbitration Lost Interrupt Flag
Set MSTOP Interrupt Flag
Set Not Acknowledge Received Interrupt Flag
Set Acknowledge Received Interrupt Flag
Set Transfer Completed Interrupt Flag
Set Address Interrupt Flag
Set Repeated START Interrupt Flag
Set START Interrupt Flag
Clear SSTOP Interrupt Flag
Description
Description
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