EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 53

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.4.3.2 Destination data end pointer
8.4.3.3 Control data configuration
2010-09-06 - d0001_Rev1.00
The dst_data_end_ptr memory location contains a pointer to the end address of the destination data.
Table 8.8 (p. 53) lists the bit assignments for this memory location.
Table 8.8. dst_data_end_ptr bit assignments
Before the controller can perform a DMA transfer, you must program this memory location with the end
address of the destination data. The controller reads this memory location when it starts a 2
transfer.
Note
For each DMA transfer, the channel_cfg memory location provides the control information for the
controller. Figure 8.8 (p. 53) shows the bit assignments for this memory location.
Figure 8.8. channel_cfg bit assignments
Table 8.9 (p. 53) lists the bit assignments for this memory location.
Table 8.9. channel_cfg bit assignments
dst_inc
Bit
[31:0]
Bit
[31:30]
[29:28]
31
30 29 28 27 26 25 24 23
dst_size
Name
dst_data_end_ptr
Name
dst_inc
dst_size
The controller does not write to this memory location.
src_inc
src_size
Description
Destination address increment.
The address increment depends on the source data width as follows:
Source data width = byte
Source data width = halfword
Source data width = word
Destination data size.
Description
Pointer to the end address of the destination data
21 20
18 17
src_prot_ctrl
dst_prot_ctrl
R_power
b00 = byte.
b01 = halfword.
b10 = word.
b11 = no increment. Address remains set to the value that
the dst_data_end_ptr memory location contains.
b00 = reserved.
b01 = halfword.
b10 = word.
b11 = no increment. Address remains set to the value that
the dst_data_end_ptr memory location contains.
b00 = reserved.
b01 = reserved.
b10 = word.
b11 = no increment. Address remains set to the value that
the dst_data_end_ptr memory location contains.
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53
13
n_m inus_1
4
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3
2
0
cycle_ctrl
next_useburst
R
DMA