EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 25

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6.5 Register Map
6.6 Register Description
6.6.1 AAP_CMD - Command Register
6.6.2 AAP_CMDKEY - Command Key Register
31:2
1
0
31:0
Offset
0x000
0x004
0x008
0x0FC
Offset
0x000
Reset
Access
Name
Bit
Offset
0x004
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
The offset register address is relative to the registers base address.
Reserved
SYSRESETREQ
A system reset request is generated when set to 1. This register is write enabled from the AAP_CMDKEY register.
DEVICEERASE
When set, all data and program code in the main block is erased, the SRAM is cleared and then the Lock bit (LB) page is erased.
This also includes the Debug lock word (DLW), causing debug access to be enabled after the next reset. The information block
user data page (UD) is left unchanged, but the User data page lock word (ULW) is erased. This register is write enabled from the
AAP_CMDKEY register.
WRITEKEY
Name
Name
Name
AAP_CMD
AAP_CMDKEY
AAP_STATUS
AAP_IDR
0
0
0x00000000
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
W1
W1
W1
Access
Access
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Bit Position
Bit Position
25
Type
W1
W1
R
R
System Reset Request
Erase the Flash Main Block, SRAM and Lock Bits
CMD Key Register
Description
Description
Description
Command Register
Command Key Register
Status Register
AAP Identification Register
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