EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 262

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

19.5.4 TIMERn_IEN - Interrupt Enable Register
15:11
10
9
8
7:3
2
1
0
Bit
Offset
0x00C
Reset
Access
Name
2010-09-06 - d0001_Rev1.00
This bit indicates that TIMERn_CC0_CCV contains a valid capture value. These bits are only used in input capture mode and are
cleared when CCMODE is written to 0b00 (Off).
Reserved
CCVBV2
This field indicates that the TIMERn_CC2_CCVB registers contain data which have not been written to TIMERn_CC2_CCV. These
bits are only used in output compare/pwm mode and are cleared when CCMODE is written to 0b00 (Off).
CCVBV1
This field indicates that the TIMERn_CC1_CCVB registers contain data which have not been written to TIMERn_CC1_CCV. These
bits are only used in output compare/pwm mode and are cleared when CCMODE is written to 0b00 (Off).
CCVBV0
This field indicates that the TIMERn_CC0_CCVB registers contain data which have not been written to TIMERn_CC0_CCV. These
bits are only used in output compare/pwm mode and are cleared when CCMODE is written to 0b00 (Off).
Reserved
TOPBV
This indicates that TIMERn_TOPB contains valid data that has not been written to TIMERn_TOP. This bit is also cleared when
TIMERn_TOP is written.
DIR
Indicates count direction.
RUNNING
Indicates if timer is running or not.
Name
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Mode
UP
DOWN
Description
TIMERn_CC0_CCV does not contain a valid capture value(FIFO empty)
TIMERn_CC0_CCV contains a valid capture value(FIFO not empty)
Description
TIMERn_CC2_CCVB does not contain valid data
TIMERn_CC2_CCVB contains valid data which will be written to TIMERn_CC2_CCV on the next update event
Description
TIMERn_CC1_CCVB does not contain valid data
TIMERn_CC1_CCVB contains valid data which will be written to TIMERn_CC1_CCV on the next update event
Description
TIMERn_CC0_CCVB does not contain valid data
TIMERn_CC0_CCVB contains valid data which will be written to TIMERn_CC0_CCV on the next update event
Description
TIMERn_TOPB does not contain valid data
TIMERn_TOPB contains valid data which will be written to TIMERn_TOP on the next update event
0
0
0
0
0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
R
R
R
R
R
R
Access
Description
Counting up
Counting down
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262
Bit Position
CC2 CCVB Valid
CC1 CCVB Valid
CC0 CCVB Valid
TOPB Valid
Direction
Running
Description
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