EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 20

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

5.3.2 FREEZE register
5.4 Flash
5.5 SRAM
2010-09-06 - d0001_Rev1.00
Figure 5.3. Read operation form Low Energy Peripherals
In every Low Energy Peripheral there is a <module_name>_FREEZE register (e.g. RTC_FREEZE).
The register contains a bit named REGFREEZE. If precise control of the synchronization process is
required, this bit may be utilized. When REGFREEZE is set, the synchronization process is halted
allowing the software to write multiple Low Energy registers before starting the synchronization process,
thus providing precise control of the module update process. The synchronization process is started by
clearing the REGFREEZE bit.
The Flash retains data in any state and typically stores the application code, special user data and
security information. The Flash memory is typically programmed through the debug interface, but can
also be erased and written to from software.
• Up to 128 KB of memory
• Page size of 512 bytes (minimum erase unit)
• Minimum 20K erase cycles endurance
• Greater than 10 years data retention at 85°C
• Lock-bits for memory protection
• Data retention in any state
The primary task of the SRAM memory is to store application data. Additionally, it is possible to execute
instructions from SRAM, and the DMA may be set up to transfer data between the SRAM, Flash and
peripherals.
• Up to 16 KB memory
• Bit-band access support
• 4KB blocks may be individually powered down when not in use
• Data retention of the entire memory in EM0 to EM3
Core Clock Dom ain
Synchronizer
Core Clock
Read Data
Read
Register 0
Register 1
Register n
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Freeze
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HW Status Register m
20
Low Frequency Clock
HW Status Register 0
HW Status Register 1
Synchronizer 0
Synchronizer 1
Low Frequency Clock Dom ain
Synchronizer n
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.
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Low Frequency Clock
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Register 0 Sync
Register 1 Sync
Register n Sync
Low Energy
Peripheral
Function
Main
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