EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 341

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

25.3.1 Clock Selection
25.3.2 Conversions
2010-09-06 - d0001_Rev1.00
Figure 25.1. ADC Overview
The ADC has an internal prescaler (PRESC bits in ADCn_CTRL) which can divide the peripheral clock
(HFPERCLK) by any factor between 1 and 128. Note that the resulting ADC_CLK should not be set to
a higher frequency than 13 MHz and not lower than 32 kHz.
A conversion consists of two phases. The input is sampled in the acquisition phase before it is converted
to digital representation during the approximation phase. The acquisition time can be configured
independently for scan and single conversions (see Section 25.3.7 (p. 344) ) by setting AT in
ADCn_SINGLECTRL/ADCn_SCANCTRL. The acquisition times can be set to any integer power of 2
from 1 to 256 ADC_CLK cycles.
Note
The analog to digital converter core uses one clock cycle per output bit in the approximation phase.
ADC Total Conversion Time (in ADC_CLK cycles) Per Output
T
Section 25.3.7.7 (p. 346) ). The minimum conversion time is 7 ADC_CYCLES with 6 bit resolution and
13 ADC_CYCLES with 12 bit resolution. The maximum conversion time is 1097728 ADC_CYCLES with
the longest acquisition time, 12 bit resolution and highest oversampling rate.
A
HFPERCLK
equals the number of acquisition cycles and N is the resolution. OSR is the oversampling ratio (see
ADCn
For high impedance sources the acquisition time should be adjusted to allow enough time
for the internal sample capacitor to fully charge. The minimum acquisition time for the
internal temperature sensor and V
ADCn_CH0
ADCn_CH1
ADCn_CH2
ADCn_CH3
ADCn_CH4
ADCn_CH5
ADCn_CH6
ADCn_CH7
Prescaler
ADCn_STATUS
5 V differential
2x(VDD-VSS)
1.25 V
2.5 V
V
ADC_CLK
DD
DAC0
DAC1
Tem p
V
V
DD
V
V
ref
DD
SS
/3
/2
ADCn_SINGLECTRL
ADCn_SCANCTRL
T
conv
ADCn_CTRL
ADCn_CMD
Sequencer
= (T
+
-
A
dd
+N) x OSR
Control
SAR
/3 is given in the electrical characteristics for the device.
...the world's most energy friendly microcontrollers
341
ADCn_SINGLEDATA
ADCn_SCANDATA
Oversam pling
Result
buffer
filter
www.energymicro.com
(25.1)