EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 327

MCU 32BIT 16KB FLASH 32-QFN

EFM32G200F16

Manufacturer Part Number
EFM32G200F16
Description
MCU 32BIT 16KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets

Specifications of EFM32G200F16

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
31:30
29:28
27:25
24
23:17
16
15:14
13:8
7:4
3
2:0
Bit
2010-09-06 - d0001_Rev1.00
Reserved
CSRESSEL
These bits select the resistance value for the internal capacitive sense resistor. Resulting actual resistor values are given in the
device datasheets.
Reserved
CSRESEN
Enable/disable the internal capacitive sense resistor.
Reserved
LPREF
Enable low power mode for VDD and bandgap references.
Reserved
VDDLEVEL
Select scaling factor for VDD reference level.V
NEGSEL
Select negative input.
Reserved
POSSEL
Select positive input.
Name
Value
0
1
2
3
Value
0
1
Value
0
1
2
3
4
5
6
7
8
9
10
11
Value
0
1
2
3
4
5
6
7
Mode
RES0
RES1
RES2
RES3
Mode
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
1V25
2V5
VDD
CAPSENSE
Mode
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
Description
Low power mode disabled
Low power mode enabled
0x0
0
1
0x00
0x8
0x0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
DD_SCALED
RW
RW
RW
RW
RW
RW
Access
Description
Internal capacitive sense resistor value 0
Internal capacitive sense resistor value 1
Internal capacitive sense resistor value 2
Internal capacitive sense resistor value 3
Description
Channel 0 as negative input
Channel 1 as negative input
Channel 2 as negative input
Channel 3 as negative input
Channel 4 as negative input
Channel 5 as negative input
Channel 6 as negative input
Channel 7 as negative input
1.25 V as negative input
2.5 V as negative input
Scaled VDD as negative input
Capacitive sense mode
Description
Channel 0 as positive input
Channel 1 as positive input
Channel 2 as positive input
Channel 3 as positive input
Channel 4 as positive input
Channel 5 as positive input
Channel 6 as positive input
Channel 7 as positive input
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327
DD
Capacitive Sense Mode Internal Resistor Select
Capacitive Sense Mode Internal Resistor Enable
Low Power Reference Mode
VDD Reference Level
Negative Input Select
Positive Input Select
Description
×VDDLEVEL×50mV/3.8V
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