EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 116

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

11.5.26 CMU_LCDCTRL - LCD Control Register
31:6
5
4
3
2
1
0
31:7
6:4
Bit
Offset
0x07C
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
Reserved
PCNT2CLKSEL
This bit controls which clock that is used for the PCNT.
PCNT2CLKEN
This bit enables/disables the clock to the PCNT.
PCNT1CLKSEL
This bit controls which clock that is used for the PCNT.
PCNT1CLKEN
This bit enables/disables the clock to the PCNT.
PCNT0CLKSEL
This bit controls which clock that is used for the PCNT.
PCNT0CLKEN
This bit enables/disables the clock to the PCNT.
Reserved
VBFDIV
These bits control the voltage boost update frequency division.
Name
Name
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Value
0
1
Mode
LFACLK
PCNT2S0
Mode
LFACLK
PCNT1S0
Mode
LFACLK
PCNT0S0
Mode
DIV1
DIV2
Description
PCNT2 is disabled
PCNT2 is enabled
Description
PCNT1 is disabled
PCNT1 is enabled
0
0
0
0
0
0
0x2
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
RW
RW
RW
RW
RW
Access
Access
Description
LFACLK is clocking PCNT2
External pin PCNT2_S0 is clocking PCNT0
Description
LFACLK is clocking PCNT0
External pin PCNT1_S0 is clocking PCNT0
Description
LFACLK is clocking PCNT0
External pin PCNT0_S0 is clocking PCNT0
Description
Voltage Boost update Frequency = LFACLK
Voltage Boost update Frequency = LFACLK/2
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116
Bit Position
PCNT2 Clock Select
PCNT2 Clock Enable
PCNT1 Clock Select
PCNT1 Clock Enable
PCNT0 Clock Select
PCNT0 Clock Enable
Voltage Boost Frequency Division
Description
Description
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