EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 163

• Manufacturer Part Number: EFM32G200F16
• Description: MCU 32BIT 16KB FLASH 32-QFN
• Manufacturer: Energy Micro
• Series: Geckor

Specifications of EFM32G200F16

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.8 V
• Data Converters: A/D 4x12b, D/A 1x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: EFM32G200
• Core: ARM Cortex-M3
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

15.4 Register Map
15.5 Register Description
15.5.1 I2Cn_CTRL - Control Register
31:19
18:16
15
Offset
0x000
0x004
0x008
0x00C
0x010
0x014
0x018
0x01C
0x020
0x024
0x028
0x02C
0x030
0x034
0x038
Offset
0x000
Reset
Access
Name
Bit
2010-09-06 - d0001_Rev1.00
The offset register address is relative to the registers base address.
Reserved
CLTO
Use to generate a timeout when CLK has been low for the given amount of time. Wraps around and continues counting when the
timeout is reached.
GIBITO
Name
Value
0
1
2
3
4
5
Name
I2Cn_CTRL
I2Cn_CMD
I2Cn_STATE
I2Cn_STATUS
I2Cn_CLKDIV
I2Cn_SADDR
I2Cn_SADDRMASK
I2Cn_RXDATA
I2Cn_RXDATAP
I2Cn_TXDATA
I2Cn_IF
I2Cn_IFS
I2Cn_IFC
I2Cn_IEN
I2Cn_ROUTE
Mode
OFF
40PCC
80PCC
160PCC
320PPC
1024PPC
0x0
0
Reset
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
RW
RW
Access
Description
Timeout disabled
Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in
a 50us timeout.
Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in
a 100us timeout.
Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results
in a 200us timeout.
Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results
in a 400us timeout.
Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results
in a 1280us timeout.
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163
Bit Position
Type
RW
W1
R
R
RW
RW
RW
R
R
W
R
W1
W1
RW
RW
Clock Low Timeout
Go Idle on Bus Idle Timeout
Description
Description
Control Register
Command Register
State Register
Status Register
Clock Division Register
Slave Address Register
Slave Address Mask Register
Receive Buffer Data Register
Receive Buffer Data Peek Register
Transmit Buffer Data Register
Interrupt Flag Register
Interrupt Flag Set Register
Interrupt Flag Clear Register
Interrupt Enable Register
I/O Routing Register
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