EFM32G200F16 Energy Micro, EFM32G200F16 Datasheet - Page 75

MCU 32BIT 16KB FLASH 32-QFN

EFM32G200F16

Manufacturer Part Number
EFM32G200F16
Description
MCU 32BIT 16KB FLASH 32-QFN
Manufacturer
Energy Micro
Series
Geckor
Datasheets

Specifications of EFM32G200F16

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SmartCard, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.8 V
Data Converters
A/D 4x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
EFM32G200
Core
ARM Cortex-M3
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
9 RMU - Reset Management Unit
9.1 Introduction
9.2 Features
9.3 Functional Description
2010-09-06 - d0001_Rev1.00
The RMU is responsible for handling the reset functionality of the EFM32G.
• Reset sources
• A software readable register indicates the cause of the last reset
The RMU monitors each of the reset sources of the EFM32G. If one or more reset sources go active,
the RMU applies reset to the EFM32G. When the reset sources go inactive the EFM32G starts up. At
startup the EFM32G loads the stack pointer and program entry point from memory, and starts execution.
As seen in Figure 9.1 (p. 76) the Power-on Reset, Brown-out Detectors and RESETn pin all reset
the whole system including the Debug Interface. A Watch Dog timeout, a Core Lockup condition or a
System reset request from software resets the whole system except the Debug Interface.
Whenever a reset source is active, the corresponding bit in the RMU_RSTCAUSE register is set. At
startup the program code may investigate this register in order to determine the cause of the reset. The
register must be cleared by software.
0 1 2 3
• Power-on Reset (POR)
• Brown-out Detection (BOD)
• RESETn pin reset
• Watchdog reset
• Software triggered reset (SYSRESETREQ)
• Core LOCKUP condition
RESETn
SYSRESETREQ
POWERON
BROWNOUT
WATCHDOG
LOCKUP
4
Reset Managem ent Unit
...the world's most energy friendly microcontrollers
RESET
75
What?
The RMU ensures correct reset operation.
It is responsible for connecting the different
reset sources to the reset lines of the
EFM32G.
Why?
A correct reset sequence is needed to
ensure safe and synchronous startup of the
EFM32G. In the case of error situations such
as power supply glitches or software crash,
the RMU provides proper reset and startup of
the EFM32G.
How?
The Power-on Reset and Brown-out
Detector of the EFM32G provides power
line monitoring with exceptionally low power
consumption. The cause of the reset may be
read from a register, thus providing software
with information about the cause of the reset.
Quick Facts
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