UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 161

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

<R>
<R>
(2) Example of setting procedure when using the external main system clock
(3) Example of setting procedure when using high-speed system clock as CPU clock and peripheral
Caution 2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to
<1> Setting frequency (OSCCTL register)
<2> Setting P121/X1 and P122/X2/EXCLK pins and selecting operation mode (OSCCTL register)
<3> Controlling external main system clock input (MOC register)
Cautions 1. Do not change the value of EXCLK and OSCSEL while the external main system clock is
hardware clock
<1> Setting high-speed system clock oscillation
Using AMPH, set the frequency to be used.
Note Set AMPH before setting the peripheral functions after a reset release. The value of AMPH can
Remark f
When EXCLK and OSCSEL are set to 1, the mode is switched from port mode to external clock input
mode.
When MSTOP is cleared to 0, the input of the external main system clock is enabled.
(See 6.6.1 (1) Example of setting procedure when oscillating the X1 clock and (2) Example of
setting procedure when using the external main system clock.)
Note The setting of <1> is not necessary when high-speed system clock is already operating.
AMPH
EXCLK
2. Set the external main system clock after the supply voltage has reached the operable
0
1
1
be changed only once after a reset release. The clock supply to the CPU is stopped for the
duration of 160 external clocks after AMPH is set to 1.
Note
be used (see CHAPTER 29 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS) to
CHAPTER 32
+125°C)).
operating.
voltage of the clock to be used (see CHAPTER 29
(STANDARD PRODUCTS) to CHAPTER 32 ELECTRICAL SPECIFICATIONS ((A2) GRADE
PRODUCTS: T
XH
1 MHz ≤ f
10 MHz < f
: High-speed system clock oscillation frequency
OSCSEL
1
XH
XH
A
External clock input mode
≤ 10 MHz
Operation Mode of High-
Speed System Clock Pin
ELECTRICAL SPECIFICATIONS ((A2) GRADE PRODUCTS: T
≤ 20 MHz
= −40 to +125°C)).
CHAPTER 6 CLOCK GENERATOR
User’s Manual U17260EJ6V0UD
Operating Frequency Control
Note
I/O port
P121/X1 Pin
ELECTRICAL SPECIFICATIONS
External clock input
P122/X2/EXCLK Pin
A
= −40 to
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