UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 556

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
24.4.2 When used as interrupt
(1) When detecting level of supply voltage (V
556
• When starting operation
• When stopping operation
Either of the following procedures must be executed.
<1> Mask the LVI interrupt (LVIMK = 1).
<2> Clear bit 2 (LVISEL) of the low-voltage detection register (LVIM) to 0 (detects level of supply voltage
<3> Set the detection voltage using bits 3 to 0 (LVIS3 to LVIS0) of the low-voltage detection level selection
<4> Set bit 7 (LVION) of LVIM to 1 (enables LVI operation).
<5> Use software to wait for an operation stabilization time (10
<6> Confirm that “supply voltage (V
<7> Clear the interrupt request flag of LVI (LVIIF) to 0.
<8> Release the interrupt mask flag of LVI (LVIMK).
<9> Clear bit 1 (LVIMD) of LVIM to 0 (generates interrupt signal when the level is detected) (default value).
<10> Execute the EI instruction (when vector interrupts are used).
Figure 24-7 shows the timing of the interrupt signal generated by the low-voltage detector. The numbers in
this timing chart correspond to <1> to <9> above.
When using 8-bit memory manipulation instruction:
Write 00H to LVIM.
When using 1-bit memory manipulation instruction:
Clear LVION to 0.
(V
register (LVIS).
“supply voltage (V
LVIM.
DD
)) (default value).
DD
) < detection voltage (V
CHAPTER 24 LOW-VOLTAGE DETECTOR
DD
User’s Manual U17260EJ6V0UD
) ≥ detection voltage (V
DD
)
LVI
)” when detecting the rising edge of V
LVI
µ
s (MAX.)).
)” when detecting the falling edge of V
DD
, at bit 0 (LVIF) of
DD
, or

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