UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 203

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

(a) 16-bit timer mode control register 0n (TMC0n)
(b) Capture/compare control register 0n (CRC0n)
(c) 16-bit timer output control register 0n (TOC0n)
(d) Prescaler mode register 0n (PRM0n)
Remark n = 0:
ES1n1
0
0
0
0
n = 0, 1:
OSPT0n
ES1n0
Figure 7-25. Example of Register Settings in External Event Counter Mode (1/2)
0
0
0
0
µ
µ
OSPE0n
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
ES0n1
0
0/1
0
0
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
TOC0n4
ES0n0
0
0
0/1
0/1
TMC0n3 TMC0n2 TMC0n1
LVS0n
1
0
User’s Manual U17260EJ6V0UD
0/1
3
0
CRC0n2 CRC0n1 CRC0n0
LVR0n
1
0
0/1
2
0
PRM0n1 PRM0n0
TOC0n1
0
0
0/1
1
OVF0n
0
0
TOE0n
0/1
1
Clears and starts on match
between TM0n and CR00n.
CR00n used as
compare register
Selects count clock
(specifies valid edge of TI00n).
00: Falling edge detection
01: Rising edge detection
10: Setting prohibited
11: Both edges detection
0: Disables TO0n output
1: Enables TO0n output
Specifies initial value of
TO0n output F/F
00: Does not invert TO0n output on match
01: Inverts TO0n output on match between
10: Inverts TO0n output on match between
11: Inverts TO0n output on match between
between TM0n and CR00n/CR01n.
TM0n and CR00n.
TM0n and CR01n.
TM0n and CR00n/CR01n.
203