UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 732

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
732
16-bit
timer/event
counters
00, 01
Function
TM0n: 16-bit
timer counter 0n
CR00n, CR01n:
16-bit timer
capture/compare
registers 00n,
01n
TMC0n: 16-bit
timer mode
control register 0n
CRC0n: Capture/
compare control
register 0n
TOC0n: 16-bit
timer output
control register
0n
PRM0n:
Prescaler mode
register 0n
Clear & start mode
entered by TI00n pin
valid edge input
PPG output
One-shot pulse
output
Details of
Function
To change the mode from the capture mode to the comparison mode, first clear
the TMC0n3 and TMC0n2 bits to 00, and then change the setting. A value that
has been once captured remains stored in CR00n unless the device is reset. If
the mode has been changed to the comparison mode, be sure to set a
comparison value.
Even if TM0n is read, the value is not captured by CR01n.
CR00n does not perform the capture operation when it is set in the comparison
mode, even if a capture trigger is input to it.
CR01n does not perform the capture operation when it is set in the comparison
mode, even if a capture trigger is input to it.
To capture the count value of the TM0n register to the CR00n register by using
the phase reverse to that input to the TI00n pin, the interrupt request signal
(INTTM00n) is not generated after the value has been captured. If the valid edge
is detected on the TI01n pin during this operation, the capture operation is not
performed but the INTTM00n signal is generated as an external interrupt signal.
To not use the external interrupt, mask the INTTM00n signal.
16-bit timer/event counter 0n starts operation at the moment TMC0n2 and
TMC0n3 are set to values other than 00 (operation stop mode), respectively. Set
TMC0n2 and TMC0n3 to 00 to stop the operation.
To ensure that the capture operation is performed properly, the capture trigger
requires a pulse two cycles longer than the count clock selected by prescaler
mode register 0n (PRM0n).
Be sure to set TOC0n using the following procedure.
<1> Set TOC0n4 and TOC0n1 to 1.
<2> Set only TOE0n to 1.
<3> Set either of LVS0n or LVR0n to 1.
Do not apply the following setting when setting the PRM0n1 and PRM0n0 bits to
11 (to specify the valid edge of the TI00n pin as a count clock).
• Clear & start mode entered by the TI00n pin valid edge
• Setting the TI00n pin as a capture trigger
If the operation of the 16-bit timer/event counter 0n is enabled when the TI00n or
TI01n pin is at high level and when the valid edge of the TI00n or TI01n pin is
specified to be the rising edge or both edges, the high level of the TI00n or TI01n
pin is detected as a rising edge. Note this when the TI00n or TI01n pin is pulled
up. However, the rising edge is not detected when the timer operation has been
once stopped and then is enabled again.
The valid edge of TI010 and timer output (TO00) cannot be used for the P01 pin
at the same time, and the valid edge of TI011 and timer output (TO01) cannot be
used for the P06 pin at the same time. Select either of the functions.
Do not set the count clock as the valid edge of the TI00n pin (PRM0n1 and
PRM0n0 = 11). When PRM0n1 and PRM0n0 = 11, TM0n is cleared.
To change the duty factor (value of CR01n) during operation, see 7.5.1
Rewriting CR01n during TM0n operation.
Set values to CR00n and CR01n such that the condition 0000H ≤ CR01n <
CR00n ≤ FFFFH is satisfied.
Do not input the trigger again (setting OSPT0n to 1 or detecting the valid edge of
the TI00n pin) while the one-shot pulse is output. To output the one-shot pulse
again, generate the trigger after the current one-shot pulse output has completed.
To use only the setting of OSPT0n to 1 as the trigger of one-shot pulse output, do
not change the level of the TI00n pin or its alternate function port pin. Otherwise,
the pulse will be unexpectedly output.
Do not set the same value to CR00n and CR01n.
APPENDIX D LIST OF CAUTIONS
User’s Manual U17260EJ6V0UD
Cautions
p. 179
p. 180
p. 181
p. 181
p. 183
p. 184
pp. 187,
188
p. 189
p. 192
p. 192
p. 192
p. 206
p. 229
p. 230
p. 232
p. 232
p. 234
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