UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 219

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
<R>
Compare match interrupt
Compare match interrupt
Figure 7-36. Example of Software Processing in Clear & Start Mode Entered by TI00n Pin Valid Edge Input
Note Care must be exercised when setting TOC0n. For details, see 7.3 (3) 16-bit timer output control register
Remark n = 0:
<1> Count operation start flow
<2> TM0n register clear & start flow
(TMC0n3, TMC0n2)
Compare register
Compare register
Count clear input
(TI00n pin input)
0n (TOC0n).
TMC0n3, TMC0n2 bits = 10
TM0n register
CR00n, CR01n registers,
Operable bits
n = 0, 1:
Edge input to TI00n pin
TO0n output
(INTTM00n)
(INTTM01n)
Register initial setting
TMC0n.TMC0n1 bit,
TOC0n register
PRM0n register,
CRC0n register,
(CR00n)
(CR01n)
0000H
port setting
START
µ
µ
PD78F0531, 78F0532, 78F0533
PD78F0534, 78F0535, 78F0536, 78F0537, 78F0537D
Note
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 00 AND 01
00
,
<1>
Initial setting of these
registers is performed
before setting the
TMC0n3 and TMC0n2
bits to 10.
Starts count operation
When the valid edge is input to the TI00n pin,
the value of the TM0n register is cleared.
User’s Manual U17260EJ6V0UD
N
M
<2>
<3> Count operation stop flow
10
M
N
N
TMC0n3, TMC0n2 bits = 00
M
<2>
STOP
<2>
N
M
<2>
The counter is initialized
and counting is stopped
by clearing the TMC0n3
and TMC0n2 bits to 00.
N
M
<3>
00
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