UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 456
UPD78F0537DGA(T)-9EV-A
Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0537DGA(T)-9EV-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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(3) Slave operation
The processing procedure of the slave operation is as follows.
Basically, the slave operation is event-driven. Therefore, processing by the INTIIC0 interrupt (processing that
must substantially change the operation status such as detection of a stop condition during communication) is
necessary.
In the following explanation, it is assumed that the extension code is not supported for data communication. It
is also assumed that the INTIIC0 interrupt servicing only performs status transition processing, and that actual
data communication is performed by the main processing.
Therefore, data communication processing is performed by preparing the following three flags and passing
them to the main processing instead of INTIIC0.
<1> Communication mode flag
<2> Ready flag
<3> Communication direction flag
This flag indicates the following two communication statuses.
• Clear mode:
• Communication mode: Status in which data communication is performed (from valid address detection
This flag indicates that data communication is enabled. Its function is the same as the INTIIC0 interrupt
for ordinary data communication.
processing. Clear this flag by interrupt servicing when communication is started. However, the ready flag
is not set by interrupt servicing when the first data is transmitted. Therefore, the first data is transmitted
without the flag being cleared (an address match is interpreted as a request for the next data).
This flag indicates the direction of communication. Its value is the same as TRC0.
IIC0
INTIIC0
Setting
Status in which data communication is not performed
to stop condition detection, no detection of ACK from master, address
mismatch)
CHAPTER 17 SERIAL INTERFACE IIC0
User’s Manual U17260EJ6V0UD
This flag is set by interrupt servicing and cleared by the main
Interrupt servicing
Setting
Data
Flag
Main processing
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