UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 727

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
This appendix lists cautions described in this document.
“Classification (hard/soft)” in table is as follows.
Hard:
Soft:
Pin function
Pin function
Memory
space
Function
Cautions for microcontroller internal/external hardware
Cautions for software such as register settings or programs
AV
EV
REGC
ANI0/P20 to
ANI7/P27
P31/INTP2/
OCD1A
P121/X1
REGC pin
IMS, IXS: Internal
memory size
switching register,
internal expansion
RAM size
switching register
Memory bank
SFR: Special
function register
SP: Stack
pointer
SS
DD
Details of
Function
, EV
SS
Make AV
Make EV
Connect the REGC pin to V
ANI0/P20 to ANI7/P27 are set in the analog input mode after release of reset.
In the product with an on-chip debug function (
P31/INTP2/OCD1A pin down before a reset, release to prevent malfunction.
For products without an on-chip debug function and with the flash memory of 48
KB or more (
product rank of “I”, “K”, or “E”, and for the product with an on-chip debug function
(
memory with a flash programmer.
• P31/INTP2/OCD1A: Connect to EV
The above connection is not necessary when writing the flash memory by means
of self programming.
For products without an on-chip debug function and with the flash memory of 48
KB or more (
product rank of “I”, “K”, or “E”, and for the product with an on-chip debug function
(
memory with a flash programmer.
• P121/X1/OCD0A: When using this pin as a port, connect it to V
The above connection is not necessary when writing the flash memory by means
of self programming.
Keep the wiring length as short as possible for the broken-line part in the above figure. p. 42
Regardless of the internal memory capacity, the initial values of the internal
memory size switching register (IMS) and internal expansion RAM size switching
register (IXS) of all products in the 78K0/KE2 are fixed (IMS = CFH, IXS = 0CH).
Therefore, set the value corresponding to each product as indicated below.
To set the memory size, set IMS and then IXS. Set the memory size so that the
internal ROM and internal expansion RAM areas do not overlap.
Instructions cannot be fetched between different memory banks.
Branch and access cannot be directly executed between different memory banks.
Execute branch or access between different memory banks via the common area.
Allocate interrupt servicing in the common area.
An instruction that extends from 7FFFH to 8000H can only be executed in memory
bank 0.
Do not access addresses to which SFRs are not assigned.
Since reset signal generation makes the SP contents undefined, be sure to
initialize the SP before using the stack.
µ
µ
PD78F0537D), connect P31/INTP2/OCD1A as follows when writing the flash
PD78F0537D), connect P121/X1/OCD0A as follows when writing the flash
(10 kΩ: recommended) (in the input mode) or leave it open (in the output mode).
APPENDIX D LIST OF CAUTIONS
SS
DD
and EV
the same potential as V
µ
µ
User’s Manual U17260EJ6V0UD
PD78F0534, 78F0535, 78F0536, and 78F0537) and having a
PD78F0534, 78F0535, 78F0536, and 78F0537) and having a
SS
the same potential as V
SS
via a capacitor (0.47 to 1
DD
Cautions
.
SS
via a resistor (10 kΩ: recommended).
SS
µ
.
PD78F0537D), be sure to pull the
µ
F: recommended).
SS
via a resistor
pp. 22,
23
pp. 22,
23
p. 22,
23
pp. 22,
23, 38
p. 38
p. 38
p. 40
p. 47
p. 47
p. 60
p. 60
p. 60
p. 60
p. 61
p. 70
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