UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 308
UPD78F0537DGA(T)-9EV-A
Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0537DGA(T)-9EV-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
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12.2 Configuration of Clock Output/Buzzer Output Controller
12.3 Registers Controlling Clock Output/Buzzer Output Controller
308
The clock output/buzzer output controller includes the following hardware.
The following two registers are used to control the clock output/buzzer output controller.
• Clock output selection register (CKS)
• Port mode register 14 (PM14)
(1) Clock output selection register (CKS)
This register sets output enable/disable for clock output (PCL) and for the buzzer frequency output (BUZ), and
sets the output clock.
CKS is set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets CKS to 00H.
Control registers
Table 12-1. Configuration of Clock Output/Buzzer Output Controller
CHAPTER 12 CLOCK OUTPUT/BUZZER OUTPUT CONTROLLER
Item
Clock output selection register (CKS)
Port mode register 14 (PM14)
Port register 14 (P14)
User’s Manual U17260EJ6V0UD
Configuration
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