UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 761

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

3rd edition
Edition
Revision of chapter
Modification of description in 8.2 (2) 8-bit timer compare register 5n (CR5n)
Modification of Figure 9-2 Block Diagram of 8-Bit Timer H1
Modification of description in (1) 8-bit timer H compare register 0n (CMP0n) and
(2) 8-bit time r H compare register 1n (CMP1n) in 9.2
Modification of Figure 9-6 Format of 8-Bit Timer H Mode Register 1 (TMHMD1)
Modification of Figure 9-12 (e) Operation by changing CMP1n (CMP1n = 02H →
03H, CMP0n = A5H)
Modification of description in 9.4.3 Carrier generator operation (8-bit timer H1
only)
Addition of <3> to Figure 9-13 Transfer Timing
Addition of <8> to Setting in 9.4.3
Modification of (a) Operation when CMP01 = N, CMP11 = N and (b) Operation
when CMP01 = N, CMP11 = M in Figure 9-15
Modification of description in Figure 9-15 (c) Operation when CMP11 is changed
Modification of description in 11.1 Functions of Watchdog Timer
Addition to description in and addition of Caution 4 to 11.4.1 Controlling operation
of watchdog timer
Addition of Note 1 and Cautions 1 and 2 to Figure 12-2 Format of Clock Output
Selection Register (CKS)
Modification of the following items in 13.2 Configuration of A/D Converter
(2) Sample & hold circuit
(3) Series resistor string
(5) Successive approximation register (SAR)
(9) AV
Addition to Caution 1 in and addition of Caution 4 to Table 13-2 A/D Conversion
Time Selection
Modification of Cautions 2 and 3 in Figure 13-8 Format of Analog Input Channel
Specification Register (ADS)
Modification of description in 13.3 (5) A/D port configuration register (ADPC)
Modification of Cautions 1 and 2 in Figure 13-9 Format of A/D Port
Configuration Register (ADPC)
Modification of Table 13-3 Setting Functions of ANI0/P20 to ANI7/P27 Pins
Modification of 13.4.1 Basic operations of A/D converter
REF
pin
APPENDIX E REVISION HISTORY
User’s Manual U17260EJ6V0UD
Description
CHAPTER 7 16-BIT
TIMER/EVENT
COUNTERS 00 AND 01
CHAPTER 8 8-BIT
TIMER/EVENT
COUNTERS 50 AND 51
CHAPTER 9 8-BIT
TIMERS H0 AND H1
CHAPTER 11
WATCHDOG TIMER
CHAPTER 12 CLOCK
OUTPUT/BUZZER
OUTPUT
CONTROLLER
CHAPTER 13 A/D
CONVERTER
Chapter
(5/16)
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