UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 498

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UPD78F0537DGA(T)-9EV-A

Manufacturer Part Number
UPD78F0537DGA(T)-9EV-A
Description
8BIT MCU, 128K FLASH, 7KB RAM, SMD
Manufacturer
NEC
Datasheet

Specifications of UPD78F0537DGA(T)-9EV-A

Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
7KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
128KB
Oscillator Type
External, Internal
498
Maskable
Software
Reset
Interrupt
Notes 1.
Type
2.
3.
4.
Priority
Default
The default priority is the priority applicable when two or more maskable interrupts are generated
simultaneously. 0 is the highest priority, and 27 is the lowest.
Basic configuration types (A) to (D) correspond to (A) to (D) in Figure 19-1.
The interrupt sources INTDMU, INTCSI11, INTTM001, and INTTM011 are available only in the
µ
When bit 1 (LVIMD) of the low-voltage detection register (LVIM) is set to 1.
24
25
26
27
PD78F0534, 78F0535, 78F0536, 78F0537, and 78F0537D.
Note 1
INTIIC0/
INTDMU
INTCSI11
INTTM001
INTTM011
BRK
RESET
POC
LVI
WDT
Name
Note 3
Note 3
Note 3
Note 3
End of IIC0 communication/end of
multiply/divide operation
End of CSI11 communication
Match between TM01 and CR001
(when compare register is specified),
TI011 pin valid edge detection
(when capture register is specified)
Match between TM01 and CR011
(when compare register is specified),
TI001 pin valid edge detection
(when capture register is specified)
BRK instruction execution
Reset input
Power-on clear
Low-voltage detection
WDT overflow
Table 19-1. Interrupt Source List (2/2)
CHAPTER 19 INTERRUPT FUNCTIONS
Interrupt Source
User’s Manual U17260EJ6V0UD
Trigger
Note 4
Internal
Internal/
External
Address
003AH
003EH
0034H
0036H
0038H
0000H
Vector
Table
Configuration
Type
Basic
(A)
(D)
Note 2

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