UPD78F0537DGA(T)-9EV-A NEC, UPD78F0537DGA(T)-9EV-A Datasheet - Page 705

• Manufacturer Part Number: UPD78F0537DGA(T)-9EV-A
• Description: 8BIT MCU, 128K FLASH, 7KB RAM, SMD
• Manufacturer: NEC

Specifications of UPD78F0537DGA(T)-9EV-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 7KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 128KB
• Oscillator Type: External, Internal

35.2 Peripheral Hardware That Generates Wait
clocks.
Caution When the CPU is operating on the subsystem clock and the peripheral hardware clock is stopped,
Remark The clock is the CPU clock (f
Serial interface
UART0
Serial interface
UART6
Serial interface
IIC0
A/D converter
Table 35-1 lists the registers that issue a wait request when accessed by the CPU, and the number of CPU wait
Peripheral
Hardware
do not access the registers listed above using an access method in which a wait request is issued.
Table 35-1. Registers That Generate Wait and Number of CPU Wait Clocks
ASIS0
ASIS6
IICS0
ADM
ADS
ADPC
ADCR
The above number of clocks is when the same source clock is selected for f
clocks can be calculated by the following expression and under the following conditions.
<Calculating number of wait clocks>
• Number of wait clocks =
<Conditions for maximum/minimum number of wait clocks>
• Maximum number of times: Maximum speed of CPU (f
• Minimum number of times: Minimum speed of CPU (f
* Fraction is truncated if the number of wait clocks ≤ 0.5 and rounded up if the number of wait clocks > 0.5.
f
f
f
f
AD
CPU
PRS
XP
:
:
: Peripheral hardware clock frequency
: CPU clock frequency
Register
A/D conversion clock frequency (f
Main system clock frequency
CPU
CHAPTER 35 CAUTIONS FOR WAIT
).
2 f
Read
Read
Read
Write
Write
Write
Read
User’s Manual U17260EJ6V0UD
f
AD
CPU
+ 1
Access
PRS
/2 to f
PRS
SUB
/12)
XP
/2), highest speed of A/D conversion clock (f
), lowest speed of A/D conversion clock (f
1 clock (fixed)
1 clock (fixed)
1 clock (fixed)
1 to 5 clocks (when f
1 to 7 clocks (when f
1 to 9 clocks (when f
2 to 13 clocks (when f
2 to 17 clocks (when f
2 to 25 clocks (when f
Number of Wait Clocks
CPU
and f
AD
AD
AD
AD
AD
AD
= f
= f
= f
= f
= f
= f
PRS
PRS
PRS
PRS
PRS
PRS
PRS
. The number of wait
/2 is selected)
/3 is selected)
/4 is selected)
/6 is selected)
/8 is selected)
/12 is selected)
PRS
PRS
/12)
/2)
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